0.1Hz ~ 10MHz frequency range
Independent control of pulse delay
50ns minimum pulse width
Square wave, double pulse, and delayed pulse
Free-run, gated, and triggered modes
TTL/CMOS and sync outputs
Two switch setting for outputs: 0.1 ~ 1.0V and 1.0 ~ 10V with a rise/fall time of 10ns into 50ohm
Load: 15ns maximum
PERIOD, PULSE WIDTH, DELAY
Each parameter is variable within 8 overlapping decade ranges with a vernier providing continuously variable
control within each range.
Range: 100nsec to 10sec (10MHz to 0•1Hz).
Range: 50nsec to 5sec
Range: 50nsec to 5sec
Normal operational mode in which pulses are generated continuously at 0.1Hz to 10MHz.
DC to 10MHz pulse train in synchronism with external trigger pulses; pulse width determined by pulse width
controls. Trigger can be generated manually from front panel button.
0.Hz to 10MHz pulse train, parameters set by period and pulse width controls, starts synchronously with
leading edge of gate input. Last pulse is completed at the end of gating period. Gating signal can be
generated manually from front panel button.
One pulse is generated each period. The delay setting is ignored.
SQUAREWAVEMark : Space ratio: 1:1 ±10%.
0.1Hz to 10MHz square wave, frequency set by the period controls. Pulse width and delay settings ignored.
A second pulse is generated after a delay set by the delay controls; the delay is related to the leading edge
of the first pulse.
A pulse is generated after a delay set by the delay controls; the delay is related to rising edge of the
INPUTSFrequency range: DC ~ 10MHz
Signal range: TTL threshold; max. input ±10V.
Min. pulse width: >30nsec.
Input Impedance: Typically 10kW.
OUTPUTSAmplitude: Two switch selectable ranges of 0.1V ~ 1.0V and 1V ~ 10V from 50ohm. (50mV to 500mV and 500mV
to 5V into 50ohm). Adjustable within ranges by a single turn vernier.
Rise/Fall Times: Typically 10nsec into 50ohm load. Maximum 15ns.
Aberrations: Typically <5% for output set at >20% of range maximum, into 50ohm
Duplicates 50W output but at a fixed CMOS/TTL level.
Amplitude: A positive going pulse at CMOS/TTL level.
Timing: Leading edge starts >20nsec before the TTL/50WW output transition.
Duration: Typically 30nsec.
Inverts the AUX and 50W outputs.
Power requirements: 115/230VAC, 50/60Hz, ±14%, 20VA max.
Operating range: + 5°C to 40°C, 20-80% RH.
Storage range: - 40°C to 70°C
Safety: Complies with EN61010-1.
EMC: Complies with EN55081-1 and EN50082-1.
Dimensions: 5.5" (H) x 8.6" (W) x 9.0" (D)
Weight: 3.5 lbs.
|MCM Part #:||72-6860|
|Tenma Part #:||72-6860|
|Package Specifications & Dimensions|
Need to Return?
|Extra Shipping Charge:||No|
MCM Cat 57, Page 1261
MCM Cat 56, Page 1098View in Catalog